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Circuit for generating an internal enabling signal

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专利名称:Circuit for generating an internal enabling

signal for an output buffer of a memory

发明人:Antonino La Malfa,Marco Messina申请号:US11337030申请日:20060120

公开号:US20060181311A1公开日:20060817

专利附图:

摘要:A circuit is for generating an internal enabling signal for the output buffer of amemory as a function of external commands for enabling the memory and for outputtingdata. The circuit may be input with the external command for enabling the memory and

with internally generated flags signaling when the memory is being read and when a readoperation of data from the memory ends. The circuit may generate a first intermediatesignal having a null logic value when the memory is enabled and the read operation ofdata from the memory ends. The circuit may further generate the internal enabling signalas a logic NOR between the first intermediate signal and a logic OR between the externalcommand enabling the memory and the external command for outputting data.

申请人:Antonino La Malfa,Marco Messina

地址:Catania IT,Augusta IT

国籍:IT,IT

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